Senior Functional Verification Engineer - Graphics/Multimedia
Hyderabad, Telangana, India · Full Time
Be the first to apply
- Experience
- 12+ yrs
- Salary
- —
- Openings
- 1
- Posted
- 5 hours ago
- Work mode
- In office
- Education
- Bachelors or Masters in Computer Engineering or Electrical Engineering
- Resume
- Required to apply
Where you'll work
Sign in to tell us what does and doesn't work for you here — it sharpens every match we show you.
Job description
About AMD
AMD is committed to advancing technology that enhances our lives by driving innovations in supercomputing, high-performance computing, cloud services, and artificial intelligence. We seek individuals dedicated to impactful technology and problem-solving at a global scale.
Role Summary
As part of the Client/Graphics Group, this position involves bringing state-of-the-art designs to fruition. Collaborating closely with architecture, IP design, physical design, and product engineering teams, you will play a critical role in ensuring successful first-pass silicon implementation.
Key Responsibilities
- Lead pre-silicon verification activities encompassing full-chip, block, multi-chip, and system-level testing.
- Develop and specify comprehensive verification plans at both SoC and IP levels.
- Evaluate and review verification strategies for complex ASIC blocks.
- Create advanced verification environments leveraging coverage and assertion-based methodologies, including automated, reusable, and self-checking frameworks at both block and full-chip scope.
- Design constrained random generators and reference models to enhance test coverage.
- Directly engage in hands-on functional verification tasks, defining scope and delivery.
- Provide mentorship and guidance to junior team members to build a robust verification team.
- Collaborate with internal and external stakeholders to develop company-wide verification solutions.
Preferred Qualifications and Experience
- At least 12 years of experience specializing in ASIC design verification.
- Deep understanding of ASIC design processes and SoC architectures.
- Proficient in constructing complex testbenches and models using Verilog, SystemVerilog, or SystemC.
- Strong background in coverage-driven verification methodologies.
- Expertise in drafting detailed test plans and test cases.
- Exceptional skills in debugging functional simulations.
- Experience with random test generation, coverage analysis, and failure troubleshooting.
- Knowledge of low power verification approaches (NLP/UPF) and experience with emulation are advantageous.
- Proficient programming abilities in Verilog, SystemVerilog, PLI interface, C/C++, Perl, and shell scripting.
- Excellent communication skills with a focus on fostering teamwork in a global environment.
Educational Background
Possession of a Bachelor's or Master's degree in Computer Engineering or Electrical Engineering is required.
Additional Information
AMD offers a comprehensive benefits package. The organization is an equal opportunity employer, embracing inclusivity without discrimination based on numerous protected characteristics. Applicants' needs will be accommodated per applicable laws throughout the recruitment process. AMD may utilize artificial intelligence tools in candidate screening and selection in alignment with company policies.
Level
Senior
Minimum education
Master's Degree