Senior Principal Software Engineer - Xcelium Multi-Core Technologies

Role Overview

We are looking for a highly skilled R&D software engineer to join the Xcelium team that develops Cadence's leading logic simulator. The focus is on advancing multi-core technologies such as Distributed Simulation and Multi-Core Checkers within the Xcelium simulator.

Key Responsibilities

• Design, develop, and maintain Xcelium Distributed Simulation capabilities to run a single simulation concurrently across multiple processes on different machines, ensuring cohesive and synchronized operation.
• Enhance usability and optimize performance for distributed simulations by simplifying setup, configuration, diagnostics, and targeting optimizations for high-priority customer cases.
• Support development and enhancement of Multi-Core Checkers technology to accelerate simulation by distributing checker modules across cores while maintaining correctness.
• Improve Xcelium multi-core RTL technology to further speed up RTL design simulations.
• Translate customer requirements into scalable, robust solutions suitable for broad Xcelium user adoption.
• Collaborate with product engineering, field application engineers, and senior R&D personnel to resolve issues and implement solutions.
• Identify and fix performance bottlenecks in distributed and multi-core simulation, boosting runtime efficiency and resource usage.
• Enhance user experience through better error messages, defaults, automation, and documentation-friendly workflows.
• Develop high-quality, maintainable code with comprehensive diagnostics, regression tests, and production-level support.
• Investigate complex issues across distributed simulation and multi-core technologies, working closely with validation teams on test coverage and regression strategies.
• Coordinate cross-team collaboration to align architecture and delivery plans across Xcelium multi-core projects.
• Assume technical ownership of significant features from design to deployment and ongoing support.
• Contribute to technical documentation and share best practices internally.
• Keep up to date with trends in verification workloads, large SoC simulations, and high-performance simulation needs.
• Manage team tasks and sprint progress via Jira, facilitating planning, prioritization, and risk mitigation.

Required Qualifications and Skills

• Bachelor’s degree in Computer Science or related technical field.
• Minimum 5 years developing complex C/C++ systems, preferably in EDA, simulation, compilers, runtime, or high-performance computing.
• Strong expertise in multi-threaded, multi-process, or distributed software architectures, including synchronization and debugging.
• Experience creating performance-sensitive infrastructure focusing on scalability, correctness, reliability, and usability.
• Proficient with Linux development environments, debugging tools, source control, build systems, and regression-driven development.
• Familiarity with SystemVerilog, Verilog, UVM, logic simulation, or semiconductor verification workflows is highly desirable.
• Experience with EDA simulation technologies and inter-process communication is a plus.
• Excellent analytical and debugging skills able to handle complex issues across vast codebases and different customer environments.
• Fluent English communication skills, capable of effective teamwork across global R&D and customer interfaces.
• Self-driven and detail-focused, capable of handling challenging technical problems from inception to production deployment.