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Engineer/Staff Engineer – Chip Physical Verification Engineer
Singapore · Full Time
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- Salary
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- 1
- Posted
- 5 ദിവസം മുൻപ്
- Work mode
- In office
- Education
- Bachelor's or Master's degree
- Resume
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Where you'll work
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Job description
Job Overview
Join MediaTek's Chip Physical Verification team focused on defining and supporting physical sign-off flows and solutions for SoC designs in advanced technology nodes. This role plays a crucial part in ensuring design integrity before tape-out through comprehensive verification methodologies.
Key Responsibilities
- Lead and execute full-chip physical verification sign-off covering design rule checks (DRC), layout versus schematic (LVS), antenna checks (ANT), electrical rule checks (ERC), electrostatic discharge considerations (ESD), and parasitic extraction rule checks (PERC) essential for tape-out readiness.
- Collaborate closely with the Place & Route team to identify and resolve layout integration challenges across the complete chip design.
- Interface and coordinate with internal intellectual property (IP) owners to address IP-centric issues within the verification flow.
- Work alongside the Manufacturing team to troubleshoot and resolve design rule check-related concerns.
- Develop and implement automation tools to enhance efficiency and streamline the tape-out process.
- Document and report any physical verification issues encountered during tape-out phases.
Required Qualifications and Skills
- Bachelor's or Master's degree in Electrical/Electronic Engineering or Computer Science.
- Working knowledge of integrated circuit (IC) design flows from front-end to back-end stages.
- Preferred experience with industry-standard physical verification tools such as Calibre, ICV, Assura, and Star-RCXT.
- Strong proficiency in scripting languages including Python, TCL, Perl, or C-shell to support automation and tool integration.
- Comfortable and skilled in UNIX or Linux operating systems.
- Excellent communication abilities paired with strong problem-solving and analytical skills.
- Exposure or experience in 3D IC design technologies like CoWoS, SoIC, or EMIB is advantageous.
Location
This position is based at One North, Singapore, requiring on-site presence.
Minimum education
Bachelor's Degree
How they work
Communication
Teamwork & Collaboration
Problem Solving