Senior/Staff Design Verification Engineer

Job Overview

Join a dynamic verification team that embraces innovation to tackle increasing design complexities. As a Design Verification Engineer, you will utilize cutting-edge verification approaches including UVM, C/C++ co-simulation, system emulation, mixed-mode simulation, and formal verification to ensure flawless design quality.

Responsibilities

Your role involves contributing to a team focused on achieving zero defects through smart and effective verification strategies.

Candidate Profile and Requirements

• Hands-on experience implementing UVM verification methodologies.
• Demonstrates discipline, quality awareness, and a strong drive for excellence.
• Exhibits collaborative spirit and communicates effectively within teams.
• Holds an MSEE or BSEE degree in Electrical or Computer Engineering, typically backed by 8 years of pertinent experience; exceptional fresh graduates will also be considered.
• Applicants with relevant background may qualify for Senior or Staff level roles with expanded responsibilities.
• Knowledge of video processing and video analytics technologies is advantageous.
• Competence and enthusiasm for general programming are considered beneficial.