- Experience
- 6+ yrs
- Salary
- —
- Openings
- 1
- Posted
- 1 week ago
- Work mode
- In office
- Education
- Diploma or Bachelor's in electrical/computer/electronics engineering
- Resume
- Required to apply
Where you'll work
Sign in to tell us what does and doesn't work for you here — it sharpens every match we show you.
Job description
About the Role
ASTRAWAVE specializes in designing chips for Data Processing, IP Licensing, Networking, Bus, Chiplet Interconnects, and customized chip solutions for diverse clients. We are actively looking for experienced engineers skilled in analog mixed signal layout and CAD design to enhance our high-speed and RF solutions portfolio, complementing our existing range of products.
Key Responsibilities
- Collaborate closely with circuit design engineers to optimize layouts that adhere strictly to specifications.
- Take ownership of layout realization from schematics, including floor planning, device placement, power and signal routing with attention to signal integrity improvement.
- Execute physical verification methods such as DRC, LVS, ERC, antenna checks, ESD, PERC, and LVL to ensure compliance and correctness of layouts.
- Prepare and review layout materials systematically, employing checklists and methodologies to maintain high quality standards.
- Innovate layout methodologies and contribute to their continuous improvement.
- Engage in post-layout modifications and assist in block or IP-level activities.
- Apply comprehensive knowledge of AMS layout principles, including EMIR effects, RC delay management, decoupling capacitors, and latch-up prevention.
Desired Experience
- Proven experience in technology nodes below 16nm.
- Prior involvement in high-speed or RF layout projects.
- Familiarity with TX, RX, PLL, ADC, DAC designs is advantageous.
- Proficiency in Cadence or equivalent CAD tools for pcell development and automation using scripting languages such as Perl, Python, or TCL to boost layout productivity.
- Strong grasp of process technology and circuit design fundamentals.
- Knowledge of analog layout physical verification CAD setups.
- Minimum of 6 years hands-on experience in layout engineering.
- Experience with premier industry CAD tools and methodologies, including FinFET technology.
- Exposure to analog/digital chip-top integration is a plus.
- Ability to mentor and guide junior layout engineers to maintain quality outputs.
Educational Background
Applicants should hold a diploma or bachelor's degree in electrical, computer, or electronics engineering or an equivalent discipline.
Work Environment
The role demands teamwork, dedication to schedules, and the capability to work harmoniously within a multicultural workplace.
Minimum education
Bachelor's Degree