Principal SoC Physical Implementation and Static Timing Analysis Engineer
Bengaluru, Karnataka, India · Full Time
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- Experience
- 12+ yrs
- Salary
- —
- Openings
- 1
- Posted
- 18 घंटे पहले
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Job description
Job Overview
Seeking an experienced Static Timing Analysis (STA) Lead with over 12 years of hands-on experience in STA for System on Chips (SoCs) and individual blocks within advanced technology nodes. This role involves deep collaboration with Architects, Front-End, Design for Test (DFT), and Physical Design (PD) teams to thoroughly understand design, clocking, timing requirements and lead constraint development and timing closure efforts.
Key Responsibilities
- Develop, validate, and maintain Synopsys Design Constraints (SDC) files at both block and full-chip levels, including management of false paths, multi-cycle paths, and various test modes.
- Conduct comprehensive timing signoff analyses across multiple process, voltage, and temperature (PVT) corners and multiple operation modes (MCMM).
- Identify, debug, and resolve timing violations such as setup, hold, transition, and path-based checks.
- Lead timing closure by planning and implementing Engineering Change Orders (ECOs) and optimizing design performance.
- Work closely with RTL designers, physical design engineers, and DFT teams to ensure timing integrity and improve timing models.
- Automate physical implementation flows using industry-standard Electronic Design Automation (EDA) tools and improve existing script-based automation frameworks.
- Debug timing issues originating from gate-level simulations (GLS).
- Lead and mentor a team of STA engineers to deliver high-quality timing closure.
Qualifications and Requirements
- Minimum 12 years of experience in Static Timing Analysis for SoCs and blocks within advanced technology nodes.
- Strong ability to develop multi-mode timing constraints and execute timing signoff processes.
- Proven expertise in timing constraint writing and timing closure activities.
- Expert knowledge of STA tools and flows, along with deep understanding of PVT corners and variation handling.
- Experience collaborating effectively across multiple teams including architecture, RTL, DFT, and physical design.
Additional Information about Employer
The employer is NXP Semiconductors, located in Bengaluru, Karnataka, India, specializing in semiconductor solutions.
Industry
Semiconductors