Anushika Das

About

Electronics Engineering student specializing in VLSI Design and Technology, with hands-on experience in FPGA prototyping, Verilog HDL, VHDL, and embedded systems. Interested in internship and entry-level roles in VLSI Design, Digital Design, and Embedded Systems.

Experience

• Hardware Documentation Intern
  SFO Technologies Pvt. Ltd. (NeST)
  May 2026 – Jun 2026

Education

• Pre-University
  GHSS Cherpulassery
  Computer Science · Jul 2021 – Mar 2023
• B.Tech in Electronics Engineering (VLSI Design & Technology)
  SCMS School of Engineering and Technology
  Electronics Engineering · Oct 2023

Skills

• C
• Computer Architecture
• Embedded Systems
• Digital Design
• Embedded C
• VHDL
• LTSpice
• Technical Documentation
• BOM Preparation
• FPGA
• Cadence Virtuoso
• Xilinx Vivado
• Verilog Hdl
• Cadence Innovus

Projects

• FPGA-Based Waste Bin Fill-Level Monitoring and Waste Separation System
  Verilog HDL, Xilinx Vivado, Basys-3 FPGA (Artix-7)

  Implemented an RTL design for an automated waste segregation system on Basys-3 FPGA, including PWM servo control, sensor interfaces, FSM-based alerts, and functional verification in Vivado.

• AI-Assisted Transistor Sizing Optimization for FDSTL Domino Logic
  Cadence Virtuoso

  Major project using literature review and Cadence Virtuoso to evaluate FDSTL Domino Logic comparator performance and develop an analytical delay model; extending the optimized comparator design to a full ALU.

Courses & certifications

• Robotics with AI & Embedded Systems Training · Genzee Technologies LLP · 2024
• VLSI System on Chip Design – Overview · Maven Silicon
• Computer Networks and Internet Protocol · NPTEL